Asia Pacific Microsystems, Inc.
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MEMS Technology
Capabilities



Surface Micromachining:

  • Low stress doped poly-Si deposition
  • Low stress SiN deposition
  • High etch rate sacrificial layer deposition
  • Wet and dry release techniques

Bulk Micromachining:

  • Anisotropic (KOH & TMAH) Silicon etching
  • Deep Si etching by Bosch ICP process
  • Double side pattern alignment
  • RIE etching of poly-Si, SiN, SiO2, TaN, Ta2O5, Metals
  • Cu, Au, Ni, Ni-Fe electroplating
  • Through wafer interconnection

SOI Micromachining & SCREM:

  • Single crystal structure layer for better performance
  • Thick structure to reduce Z-axis cross sensitivity one mark simple process
  • The trade-off-limited design flexibility
  • Use commercial SOI wafer or proprietary fusing bonded wafer



CMOS & MEMS Integration

  • 5v/12v/18v/30v CMOS Capability for developing Monolithic smart MEMS
  • Vertical integration of CMOS & MEMS wafers by wafer bonding

Wafer Level Packaging:

  • Integrate various technologies such as Si, SiGe, GaAs, Compound Semiconductors thin film and thick film chips
  • Flip Chip & Multi Chip module
  • DCM-Direct Chip Module to cut cost
  • First level package to protect delicate MEMS structures
  • Flexibility to adopt the best available technology


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